1. Field of the Invention
The invention relates to an image recording apparatus and, more particularly, to an image recording apparatus for dividing elements to be driven such as a number of LED elements, exothermic resistors, or the like which are arranged.
2. Related Background Art
In an image recording apparatus such as an electrophotographic printer or the like, a photosensitive drum having a photosensitive material such as a thin organic film or the like is charged, an electrostatic latent image corresponding to a video signal or the like is formed onto the surface of the photosensitive drum by recording light generated by an LED or the like, thereafter, toner is deposited onto the photosensitive drum, the electrostatic latent image is developed, a toner image formed by the development is transferred onto a paper, and the transferred toner image and the paper are further adhered with a pressure while applying a heat thereto, thereby fixing the toner image onto the paper.
FIG. 16 is a block diagram showing a construction of a main portion such as a printing mechanism or the like of such a conventional electrophotographic printer. FIGS. 17 and 18 are time charts showing the printing operation of the conventional electrophotographic printer.
As shown in FIG. 16, the electrophotographic printer comprises: a print controller 1 for controlling the operation such as printing or the like; an LED head 2 for emitting recording light under a control of the print controller 1; a photosensitive drum (not shown) for forming an electrostatic latent image according to the recording light from the LED head 2; a developer 27 for developing the electrostatic latent image on the photosensitive drum; a conveying portion (not shown) for conveying a recording medium such as a recording paper or the like; a transfer device 13 for transferring a developed toner image onto the recording medium; a fixing device 23 for fixing the transferred image; and the like.
The print controller 1 is constructed by a microprocessor, an ROM, an RAM, an input/output port, a timer, and the like and connected to an external information processing apparatus such as a personal computer or the like. The print controller 1 allows each operating unit such as a printer to execute a process such as a printing operation or the like in response to signals such as control signal SG1 from an upper controller or the like for controlling the whole operation of the electrophotographic printer and video signal SG2 constructed by data or the like in which bit map data has one-dimensionally been arranged and the like.
The LED head 2 has a predetermined number of LED elements which are linearly arranged and generate the recording light corresponding to one dot (pixel).
In the conventional electrophotographic printer constructed as mentioned above, when a print is instructed, the upper controller forms data in which print data in, for example, a bit map format has one-dimensionally been arranged, instructs the electrophotographic printer to print by the control signal SG1, and supplies the arranged and formed data as a video signal SG2 to the print controller 1.
When the print instruction from the upper controller is detected by monitoring the control signal SG1, the print controller 1 first discriminates whether a temperature of the fixing device 23 having a heater 23a therein lies within a temperature range where it can be used or not by a fixing device temperature sensor 22. When it is out of the temperature range, the print controller 1 supplies a current to the heater 23a, thereby heating the fixing device 23 up to a temperature at which it can be used.
Subsequently, the print controller 1 rotates a motor (PM) 15 for development and transfer process through a driver 14 and, further, validates a charge signal SGC, thereby making a high voltage power source 24 for charging operative so as to apply a voltage to a charging device 12 and charging the surface of the photosensitive drum (not shown).
The print controller 1 detects the presence or absence and the kind of paper set in the electrophotographic printer by a paper remaining amount sensor 20 and a paper size sensor 21, respectively. When the presence of the paper to be used for printing is detected, the print controller 1 starts a paper feed through a driver 16. A paper feed motor (PM) 17 can be bidirectionally rotated. When the paper feed is started, first, the paper feed motor (PM) 17 is reversely rotated and the set paper is conveyed by a distance of a predetermined amount until a paper inlet port sensor 18 detects the paper. Subsequently, the paper feed motor (PM) 17 is forwardly rotated, thereby conveying the paper into the printing mechanism in the electrophotographic printer.
When the paper reaches a printable position, the print controller 1 supplies a timing signal SG3 including a main scan sync signal and a sub-scan sync signal to the upper controller. The upper controller sets the data formed by one-dimensionally arranging the print data as mentioned above to the video signal SG2 and supplies it to the print controller 1 every print line synchronously with the timing signal SG3.
The print controller 1 sets the supplied video signal SG2 to a print data signal DATA and sequentially supplies it to the LED head 2 synchronously with a clock signal CLK generated separately. When the supply of the print data signal DATA of one line is finished, the print controller 1 validates a load signal LOAD (set it to the high level) which is supplied to the LED head 2 for a predetermined period of time, thereby allowing the print data specified by the print data signal DATA to be held in the LED head 2.
After the print data was held in the LED head 2, the print controller 1 sets a strobe signal (STB-N) to the low level for a predetermined period of time. The strobe signal is used for driving the LED head 2 which is operated in accordance with the print data held in the LED head 2. When the strobe signal is at the low level, the LED head 2 drives each of the foregoing LED elements in accordance with the holding print data so as to emit the recording light.
The print controller 1 makes it possible to execute the print according to the print data held in the LED head 2 even during the reception of the video signal SG2 of the next line from the upper controller.
A very large number of LED elements in the LED head 2 are necessary, for example, 2496 LED elements are necessary in order to print an image onto the paper of the A4 size at a resolution of 300 dpi (dots per inch). If it is intended to simultaneously drive all of the LED elements, a peak of a drive current becomes high. In the electrophotographic printer, therefore, the LED elements are divided into four groups and driven every group, thereby reducing the peak of the drive current.
To realize such a divisional driving, the strobe signal (STB-N) is divided into a plurality of strobe signals STB1-N (“-N” at the end shows a negative logic which is validated at the low level), STB2-N, STB3-N, and STB4-N corresponding to those groups.
For example, in the LED head 2 using the 2496 LED elements as mentioned above, the 1st to 624th LED elements are allowed to emit the light in response to the strobe signal STB1-N, the 625th to 1248th LED elements are allowed to emit the light in response to the strobe signal STB2-N, the 1249th to 1872nd LED elements are allowed to emit the light in response to the strobe signal STB3-N, and the 1873rd to 2496th LED elements are allowed to emit the light in response to the strobe signal STB4-N, respectively.
As shown in FIG. 18, the strobe signals STB1-N to STB4-N are not simultaneously validated (are set to the low level) but are validated in order from the strobe signal STB1-N to the strobe signal STB4-N. Thus, since the LED elements divided into the four groups emit the light every group, the peak of the drive current of the LED elements is reduced.
Referring again to FIG. 16, the recording light emitted from each LED element is irradiated onto the photosensitive drum charged to a negative potential by the charging device 12 as mentioned above. An irradiation light spot corresponding to each LED element is visualized as a dot of the increased potential. In the developer 27, toner for image formation which was charged to the negative potential by a high voltage power source 26 for development is sucked to each dot by an electrical sucking force, so that a toner image is formed.
When the formed toner image is sent to a position which faces the transfer device 13 by a rotation of the photosensitive drum, it is transferred by a transfer signal SG4 onto the paper which passes through a gap between the photosensitive drum and the transfer device 13 to which a negative voltage has been applied by a high voltage power source 25 for transfer whose operation was started.
After that, when the paper to which the toner image has been transferred is come into contact with the fixing device 23 having the heater 23a therein and conveyed, the toner image is fixed onto the paper by the heat generated from the fixing device 23. The paper on which the toner image has been fixed is further conveyed, passes through a paper ejection port sensor 19 from the printing mechanism of the printer, and is ejected to the outside of the printer.
In response to the detection of each of the paper size sensor 21 and paper inlet port sensor 18, the print controller 1 applies the voltage from the high voltage power source 25 for transfer to the transfer device 13 only while the paper is passing the transfer device 13. When the print is finished and the paper passes through the paper ejection port sensor 19, the application of the voltage to the charging device 12 by the high voltage power source 24 for charging is finished and, at the same time, the rotation of the motor 15 for development and transfer process is stopped.
The details of the LED head 2 in FIG. 16 will now be described.
FIG. 19 is a diagram showing an example of a structure of the LED head 2 in FIG. 16 mentioned above. As shown in FIG. 19, the LED head 2 comprises: 2496 latch circuits LT1, LT2, . . . , and LT2496 corresponding to, for example, 2496 LED elements LD1, LD2, . . . , and LD2496; 2496 flip-flop circuits FF1, FF2, . . . , and FF2496 for supplying outputs to the corresponding latch circuits LT1 to LT2496; NAND gate circuits G1, G2, . . . , and G2496 in each of which the AND of the inverted load signal LOAD and the inverted strobe signal STB-N is supplied to one input terminal and an output of each of the corresponding latch circuits LT1 to LT2496 is supplied to the other input terminal; and switching elements TR1, TR2, . . . , and TR2496 for controlling the supply of a drive current from a power source VDD to the LED elements LD1 to LD2496 in accordance with outputs of the corresponding NAND gate circuits G1 to G2496.
The print data signal DATA is supplied to an input of the flip-flop circuit FF1 and an output of the flip-flop circuit FF1 is supplied to the flip-flop circuit FF2 at the second stage and the latch circuit LT1. An output of the flip-flop circuit FF2 at the second stage is supplied to the flip-flop circuit FF3 at the third stage and the latch circuit LT2 at the second stage. Further, the flip-flop circuits FF4 to FF2496 at the third and subsequent stages are also similarly connected. The clock signal CLK is supplied to each of the flip-flop circuits FF1 to FF2496.
The flip-flop circuits FF1 to FF2496 function as shift registers for holding the value of the inputted print data signal DATA as print data and sequentially shifting the print data to the post stage in response to the clock signal supplied to each flip-flop circuit until the print data signal DATA as much as one line is supplied to the flip-flop circuits FF1 to FF2496.
The print data for driving the LED elements LD1 to LD2496 is supplied as a print data signal DATA to the flip-flop circuit FF1 at the first stage and sequentially transferred to the flip-flop circuits at the post stage in response to the clock CLK.
When the print data signal DATA of one line is supplied to the flip-flop circuits FF1 to FF2496, the load signal LOAD is validated (set to the high level). Thus, the print data of one line held in the flip-flop circuits FF1 to FF2496 is held in the corresponding latch circuits LT1 to LT2496.
An output of an AND circuit LAND is set to the high level when the load signal LOAD inputted to the AND circuit is invalid (at the low level) and the strobe signal STB-N is valid (at the low level). Outputs of the NAND gate circuits G1 to G2496 are set to the low level when both inputs of each NAND gate circuit are at the high level, respectively. Since the switching elements TR1 to TR2496 are the p-type elements, they are made conductive when the output of the NAND gate supplied to the gate is at the low level. Therefore, when the load signal LOAD is at the low level, the strobe signal STB-N is at the low level, and the data held in the latch circuits LT1 to LT2496 is at the high level, the corresponding switching elements TR1 to T2496 are made conductive and supply the drive current from the power source VDD to the corresponding LED elements LD1 to LD2496.
Therefore, when the strobe signal STB-N is validated (set to the low level), the LED elements in which the high level data has been held in the corresponding latch circuits LT1 to LT2496 among the LED elements LD1 to LD2496 are lit on.
In the printer using the LED head 2 having such a construction, all of the LED elements LD1 to LD2496 of the LED head 2 are driven for the same time by the strobe signal STB-N. However, if there are variations in characteristics of the switching elements TR1 to TR2496 arranged every LED elements LD1 to LD2496, the LED elements LD1 to LD2496, and the like, a variation also occurs in the light emission amounts of the LED elements. Thus, a difference occurs in sizes of the dots of the electrostatic latent image formed on the photosensitive drum and a difference also occurs in sizes of dots of an image which is actually printed.
FIG. 20 is a diagram showing a construction of the LED head 2 and a variation of the light amounts (light emitting powers) of the LED elements of the LED head 2.
An upper portion of FIG. 20 shows a constructional example of the LED head 2. In this constructional example, the LED elements LD1 to LD2496 as many as 2496 dots shown in FIG. 19 mentioned above are constructed by arranging 26 LED arrays CHP1 to CHP26 each having 96 LED elements. In the constructional example, driver ICs (DRV1 to DRV26) have: the flip-flop circuits FF1 to FF2496 for driving the LED elements LD1 to LD2496 in the LED arrays CHP1 to CHP26; latch circuits LT1 to LT2496; switching elements TR1 to TR2496; and the like. Each of the driver ICs (DRV1 to DRV26) drives the 96 LED elements in the corresponding LED array. The flip-flop circuits FF1 to FF2496 in each of the driver ICs (DRV1 to DRV26) are cascade connected and a shift register similar to that described above is constructed by those flip-flop circuits FF1 to FF2496.
A graph in the lower portion in FIG. 20 shows a relation between the position of the LED element and the light amount in comparison with the LED array (CHP1 to CHP26).
A broken line (lateral line) shows a range of the variation of the light amounts (variation between the dots) with respect to the LED elements belonging to the same LED array. An alternate long and short dash line shows a range of the variation of the mean light amounts (variation between the chips) of the LED elements belonging to each LED array.
In such an LED head 2, the variation of the mean light amount between the driver ICs or between the LED arrays is larger than the variation of the light amounts of LED elements in the driver ICs constructing the LED head or between the LED elements in the LED array. Therefore, hitherto, the LED arrays have been divided into ranks of a plurality of groups on the basis of the measurement results of the mean light amounts, the LED arrays belonging to the same rank have been selected, and the LED head has been constructed by the selected LED arrays, thereby reducing the variation of the light amounts of the LED elements.
On the other hand, the variation of the light amounts of the LED elements appears as a variation of an exposing energy at the time of exposure of the photosensitive drum and becomes a variation of sizes of dots after the development. However, in case of printing a binary image constructed by characters or the like, even if there is a small difference of the dot sizes, it can be almost ignored.
However, in case of printing a multigradation image such as a photograph or the like, if there is a difference among the dot sizes, a variation occurs in print densities and a print quality deteriorates. It is, therefore, undesirable.
To prevent such a drawback, there has been known an electrophotographic printer apparatus constructed in such a manner that a light amount of each LED element is preliminarily measured, correction data corresponding to the light amount of each LED element is formed and held, and a drive current of each LED element is controlled in accordance with the correction data upon driving of the LED elements, thereby reducing an influence of the variation of the light amount of each LED element.
FIG. 21 is a block diagram showing a more detailed construction of the conventional print controller 1 and LED head 2 in case of performing such a correction.
As shown in FIG. 21, the print controller 1 has a CPU 3 and an RAM 4 and an ROM 5 which are connected to the CPU 3.
The CPU 3 receives the video signal from the upper controller, converts the received video signal into a bit map format, forms print data, and supplies the formed print data as a print data signal DATA to the LED head 2.
The LED head 2 comprises: an LED array 7 constructed by arranging a number of LED elements; an LED driver IC 6 for controlling a light emission of the LED array 7; and a non-volatile memory 8 such as an EEPROM (electrically writable and erasable ROM) (hereinafter, simply referred to as an EEPROM) for storing correction data for correcting a variation of light emission intensity of each LED element of the LED array 7. A read-out output from the EEPROM 8 is supplied to a portion for holding the correction data in the LED driver IC 6, for example, to a memory cell (not shown). Each switching element in the LED driver IC 6 and each LED element in the LED array 7 are connected by a wire (not shown).
Each signal from the print controller 1 is supplied to the LED driver IC 6 through a correcting operation control IC 11. That is, upon printing, the DATA signal as a print data signal is supplied from the print controller 1 to the LED driver IC 6 through the correcting operation control IC 11. On the other hand, when the correction data is set prior to printing, the correcting operation control IC 11 reads out the correction data from the EEPROM 8 under the control of the correcting operation control IC and supplies the correction data to the LED driver IC 6.
FIG. 22 shows an example of the correction data which is stored in the EEPROM 8. As shown in FIG. 22, the correction data is separately stored every bit. Information regarding bit 3 of the correction data for all dots is sequentially stored in head addresses among the addresses in the EEPROM 8 in order of the addresses. Each information regarding bit 2, bit 1, and bit 0 of the correction data is similarly sequentially stored in the other addresses toward the lower direction in the diagram in order of the addresses.
FIG. 23 is a time chart showing the operation in case of setting the correction data into the LED head 2.
When the correction data is set, as shown in FIG. 23, the CPU 3 sets the load signal LOAD to the high level. The CPU 3 supplies the data for setting the correcting operation control IC 11 into a correcting mode for performing the correcting operation to the correcting operation control IC 11 through a data signal line DATA synchronously with the clock CLK. Thus, the correcting operation control IC 11 is set into the correcting mode. In the correcting mode, the correcting operation control IC 11 reads out the correction data from the EEPROM 8 in response to an internal clock SCK (refer to FIGS. 24 and 25) which is formed on the basis of the clock CLK from the CPU 3 and supplies the read-out correction data to the LED driver IC 6. When the correction data from the correcting operation control IC 11 is received, the LED driver IC 6 sequentially transfers it to the shift register provided for, for example, the LED driver IC 6.
After completion of the generation of a predetermined number of clocks CLK, the CPU 3 sequentially changes the four strobe signals STB1-N to STB4-N. In response to it, the LED driver IC 6 holds the correction data into the internal memory cell or the like.
FIG. 24 is a time chart in case of writing the data into the EEPROM 8 from the CPU 3 through the correcting operation control IC 11. FIG. 25 is a time chart in the case where the correcting operation control IC 11 reads out the data from the EEPROM 8.
When the data is written into the EEPROM 8, as shown in FIG. 24, first, a signal which is inputted to a CS-N terminal (chip selection terminal) provided for the EEPROM 8 is set to the low level, thereby enabling the EEPROM 8 to operate.
Subsequently, when the SCK clock as an internal clock of the correcting operation control IC 11 is supplied from the control IC 11 to an SCK terminal provided for the EEPROM 8 and mode setting data to set the EEPROM 8 into a writing mode is supplied to an SI terminal (data signal input terminal) provided for the EEPROM 8, the EEPROM 8 is set into the writing mode by this signal.
After the EEPROM 8 is set into the writing mode, address data as a target to be written is first supplied through the SI terminal on the basis of the SCK clock. Subsequently, when the write data is supplied, it is written into the designated address in the EEPROM 8.
When the data is read out from the EEPROM 8, as shown in FIG. 25, the CS-N terminal is first set to the low level, thereby enabling the EEPROM 8 to operate.
Subsequently, when the SCK clock as an internal clock is supplied from the correcting operation control IC 11 to the SCK terminal and data to set the EEPROM 8 into a reading mode is supplied to the SI terminal, the EEPROM 8 is set into the reading mode by this signal.
After the EEPROM 8 is set to the reading mode, when address data as a target to be read out is supplied through the SI terminal, the data is read out from an area in the EEPROM 8 corresponding to the address and outputted synchronously with the SCK clock supplied from the correcting operation control IC 11 to the SCK terminal.
According to the construction shown in FIG. 21, however, although the clock CLK from the CPU 3 is supplied to the correcting operation control IC 11 and LED driver IC 6, the internal clock SCK of the control IC 11 is supplied to the SCK terminal of the EEPROM 8 from the control IC 11. Therefore, the operation of the EEPROM 8 is controlled by the internal clock SCK from the control IC 11.
Since the internal clock from the correcting operation control IC 11 is formed in the control IC 11 on the basis of the clock CLK which is received by the control IC 11 from the CPU 3, a small delay occurs as compared with the clock CLK from the CPU 3.
On the other hand, as mentioned above, the LED driver IC 6 which receives the correction data from the EEPROM 8 operates synchronously with the clock CLK from the CPU 3. There is, consequently, a room for improvement from viewpoints of elimination of the deviation between both clocks mentioned above and the increase in reliability of the correcting operation.
Since a supplying timing of the correction data from the EEPROM 8 which is made operative by the internal clock SCK is delayed from the operating timing of the LED driver which is made operative by the clock CLK, if an operating speed is raised, there is a fear that the LED driver IC 6 cannot correctly receive the correction data and there is also a room of improvement from a viewpoint of realization of a high speed of the operation.
In the above construction, in addition to the signal line for supplying the print data from the correcting operation control IC 11 to the LED driver IC 6, the signal line for supplying the correction data is necessary. Thus, the number of wirings increases and the costs also increase.
The case where the LED head is used for printing onto the paper of the A4 size at 300 dpi has been described above. However, if the user intends to improve the resolution to 600 dpi, the LED elements of the number which is twice as large as that in case of 300 dpi, that is, 4992 LED elements are necessary. If the user intends to store the correction data of 16 gradations (4 bits) per LED element, a capacity of the correction data becomes 2496 bytes (=4992 dots×4 bits=19968 bits).
Therefore, in this state, the correction data cannot be recorded in the EEPROM of 2 kbytes. The capacity of the general memory such as an EEPROM or the like is provided only at predetermined intervals, for example, on a 2-kbyte unit basis for the purpose of suppression of the manufacturing kinds or the like. Thus, if the capacity of 2 kbytes is lacking as mentioned above, the EEPROM of 4 kbytes has to be used, resulting in an increase in costs than they are needed.